Investigating CMP Synchronization Mechanisms

Synchronization is an important aspect of multi-processor programs. Though necessary to communicate data or control information across different threads of a parallel program, excessive synchronization can serialize execution to the point where little benefit is seen from creating a parallel program.1 Synchronization in the operating systems can also have a large impact on performance when coordinating shared resources across different processors such as the scheduling queue. Much research across many decades has resulted in algorithms and hardware solutions that attempt to understand the numerous trade-offs in terms of latency, bandwidth, implementation complexity, etc. Nonetheless, synchronization remains a significant concern for parallel applications and architectures. Especially now that the computer industry is at a point where multiple processors can be placed onto a single chip, the trade-offs in the design of synchronization need to be revisited. Chip Multiprocessors (CMPs) and their workloads have a number of interesting properties that affect the costs of synchronization. In the next section, we make a few basic assumptions about these properties, and form hypotheses about CMP synchronization. We then characterize the amount and cost of synchronization occurring in a particular CMP design, limiting our preliminary study on mutual exclusion (mutex) locks. Finally, we propose an on-chip lock-arbiter to dynamically handle spin-locks in a queue-based manner.